1762672

JEDEC JESD51-3

LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD FOR LEADED SURFACE MOUNT PACKAGES

standard by JEDEC Solid State Technology Association , 08/01/1996

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Full Description

This standard describes design requirements for a single layer, leaded surface mount integrated circuit package thermal test board. The standard describes board material and geometry requirements, minimum trace lenghts, trace thickness, and routing considerations. Application includes still air and moving air thermal tests.
 

Product Details

Published:
08/01/1996
Number of Pages:
11
File Size:
1 file
Note:
This product is unavailable in Russia, Ukraine, Belarus