1084084

IEEE 1450.2-2002

IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450-1999) for DC Level Specification

standard by IEEE , 03/18/2003

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Full Description

Scope

Define structures in STIL for specifying the DC conditions for a device under test. Examples of the DC conditions for device power supplies are: device power supply setup, power sequencing to the device, power supply limiting/clamping. Examples of the DC conditions for commonly used signal references are: VIL, VIH, VOL, VOH, IOL, IOH, VREF, VClampLow, VClampHi. Define structures in STIL such that the DC conditions may be specified either globally, by pattern burst, by pattern, or by vector. Define structures in STIL to allow specification of alternate DC levels. Examples of commonly used alternate levels are: VIHH, VIPP, VILL. Define structures in STIL such that the DC levels and alternate levels can be selected within a period, much the same as timed format events.

Purpose

This effort will define constructs in STIL to specify the DC conditions necessary to execute the digital vectors on Automated Test Equipment (ATE). This will complement the IEEE Std. 1450-1999 definition which defines structures for specification of timing and format information, but does not define the DC conditions under which this information should be applied.

Abstract

New IEEE Standard - Inactive-Reserved. Define structures in STIL for specifying the DC conditions for a device under test. Examples of the DC conditions for device power supplies are: device power supply setup, power sequencing to the device, power supply limit
 

Product Details

Published:
03/18/2003
ISBN(s):
0738135038, 9780738135045
Number of Pages:
31
File Size:
1 file , 410 KB
Product Code(s):
STDRES95069
Note:
This product is unavailable in Russia, Belarus