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This standard provides a method for determining solid state devices capability to withstand extreme temperature cycling. This standard applies to single-, dual- and triple-chamber temperature cycling and covers component and solder interconnection testing. It should be noted that this standard does not cover or apply to thermal shock chambers. This test is conducted to determine the ability of components and solder interconnects to withstand mechanical stresses induced by alternating high- and low-temperature extremes. Permanent changes in electrical and/or physical characteristics can result from these mechanical stresses.
 

Document History

  1. JEDEC JESD22-A104E

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    TEMPERATURE CYCLING

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  2. JEDEC JESD22-A104D


    TEMPERATURE CYCLING

    • Historical Version