1779482

JEDEC JESD12

SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)

standard by JEDEC Solid State Technology Association , 06/01/1985

📝 Amendments Available

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About This Item

 

Full Description

The purpose of these benchmarks is to provide a common set of high level functions which serve as vehicles for comparing the performance of gate arrays implemented in any technology using any internal structure. These benchmarks effectively provide an unbiased measure of gate array vendors' ability to implement a desired complex function on a particular gate array at a known level of performance.
 

Product Details

Published:
06/01/1985
Number of Pages:
14
File Size:
1 file , 230 KB
Note:
This product is unavailable in Russia, Ukraine, Belarus
 

Amendments, rulings, supplements, and errata

  1. JEDEC JESD 12-6


    ADDENDUM No. 6 to JESD12 - INTERFACE STANDARD FOR SEMICUSTOM INTEGRATED CIRCUITS

  2. JEDEC JESD 12-5


    ADDENDUM No. 5 to JESD12 - DESIGN FOR TESTABILITY GUIDELINES

  3. JEDEC JESD 12-4


    ADDENDUM No. 4 to JESD12 - METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITS

  4. JEDEC JESD 12-3


    ADDENDUM No. 3 to JESD12 - CMOS GATE ARRAY MACROCELL STANDARD

  5. JEDEC JESD 12-2


    ADDENDUM No. 2 to JESD12 - STANDARD FOR CELL-BASED INTEGRATED CIRCUIT BENCHMARK SET

  6. JEDEC JESD 12-1B


    ADDENDUM No. 1 to JESD12 - TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS