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IEEE/IEC 61523-4-2015

IEEE/IEC International Standard - Design and Verification of Low-Power Integrated Circuits

standard by IEEE/IEC , 03/24/2015

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Full Description

Scope

This standard establishes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP). The format provides the ability to specify the supply network, switches, isolation, retention, and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low-power design specification and the logic design specification captured via other formats [e.g., standard hardware description languages (HDLs)].

Purpose

The purpose of this standard is to provide portable low-power design specifications that can be used with a variety of commercial products throughout an electronic system design, analysis, verification, and implementation flow.

Abstract

Adoption Standard - Active. A method is provided for specifying power intent for an electronic design, for use in verification of the structure and behavior of the design in the context of a given power management architecture, and for driving implementation of that power management architecture. The method supports incremental refinement of power intent specifications required for IP-based design flows.
 

Product Details

Published:
03/24/2015
ISBN(s):
9782832222669, 9780738196138, 9781504417150
Number of Pages:
351
File Size:
1 file , 3.5 MB
Product Code(s):
STD20159, STDPD20159, STDPL20159
Note:
This product is unavailable in Ukraine, Russia, Belarus
 

Document History

  1. IEEE/IEC 61523-4-2023


    IEEE/IEC International Standard--Delay and power calculation standards--Part 4: Design and Verification of Low-Power, Energy-Aware Electronic Systems

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    IEEE/IEC International Standard - Design and Verification of Low-Power Integrated Circuits

    • Historical Version