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IEC 63011-1 Ed. 1.0 b:2018

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

standard by International Electrotechnical Commission , 11/28/2018

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IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.
 

Product Details

Edition:
1.0
Published:
11/28/2018
Number of Pages:
24
File Size:
1 file , 1.3 MB
Note:
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