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JEDEC JESD255

SPI Safety Extensions (CRC) for Non Volatile SPI Flash Memories (QPI and xSPI)

standard by JEDEC Solid State Technology Association , 02/01/2024

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Full Description

The JESD255 document defines CRC modes supported with 8-bit aligned and 16-bit aligned data transactions. It is limited to logical bus transactions and does not cover the electrical properties of the IO bus.

 

Product Details

Published:
02/01/2024
Number of Pages:
32
File Size:
1 file , 980 KB
Note:
This product is unavailable in Russia, Belarus