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About This Item

 

Full Description

IPC/EIA J-STD-003A provides industry-recommended test methods, defect definitions and illustrations for suppliers and users to assess the solderability of printed board surface conductors, lands and plated-through holes. This revision includes a significant change in the type of flux required to be used for solderability testing. Test methods covered include edge dip, rotary dip, solder float, wave solder and wetting balance. Produced by IPC and EIA. Supersedes J-STD-003.
 

Document History

  1. IPC J-STD-003D


    Solderability Tests for Printed Boards

    • Most Recent
  2. IPC J-STD-003C-WAM1&2


    Solderability Tests for Printed Boards with Amendment 1&2

    • Historical Version
  3. IPC J-STD-003C-WAM1


    Solderability Tests for Printed Boards with Amendment 1

    • Historical Version
  4. IPC J-STD-003C


    Solderability Tests for Printed Boards

    • Historical Version
  5. IPC J-STD-003B


    Solderability Tests for Printed Boards

    • Historical Version
  6. IPC J-STD-003A

    👀 currently
    viewing


    Solderability Tests for Printed Boards

    • Historical Version
  7. IPC J-STD-003


    Solderability Tests for Printed Boards

    • Historical Version