IEEE 1386.1-2001
IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards: PMC
standard by IEEE , 08/21/2001
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About This Item
Full Description
Scope
Define a family of high speed low profile modular mezzanine cards for VMEbus, Futurebus+(R) desktop computers, and other computer systems with the logical and electrical layers based on PCI Special Interest Group's PCI Specification, Rev 2. The proposed Common Mezzanine Card (CMC) Family standard will be referenced for the mechanical layer. The environmental layer will be specified by the working group.
Purpose
PCI (peripheral component interface) is a newly defined high speed local bus being used by several CISC and RISC microprocessors. PCI specification defines a 4.2 inch by 12.3 inch board that plugs into a motherreboard in a perpendicular fashion. These perpendicular boards are not usable in many computer applications because they use too much vertical space. This proposed standard will define the mechanics of a low profile modular horizontal mezzanine card family that uses the logical and electrical layers of the PCI specification for the local bus. I/O can be via the front panel and/or through the connector to the host computer for rear panel I/O. The proposed CMC family mechanics will be used for the mechanical layer.
Abstract
New IEEE Standard - Inactive-Withdrawn.
This standard, in conjunction with IEEE Std 1386-2001, IEEE Standard for a CommonMezzanine Card (CMC) Family, defines the physical and environmental layers of a PCI mezzaninecard (PMC) family to be usable on (but not limited to) single slot VME, VME64 and VME64x boards,CompactPCI boards, Multibus I and Multibus II boards, desktop computers, portable computers,servers, and similar types of applications. The electrical and logical layers are based on the PCIspecification from the PCI Special Interest Group. The PCI mezzanine cards allow for a variety ofoptional function expansions for the host system. I/O functionality from the PMC may be either through the mezzanine front panel, or via the backplane by routing the I/O signals through themezzanine connector to the host.
